Cell-type specific connectivity explains neural dynamics in the frontoparietal network during visuospatial working memory

Attractor networks are often proposed as a model for persistent activity in neural systems that underlie working memory and decision making. These theoretical models rely on the interplay between excitatory and inhibitory neurons to generate and maintain a veridical representation of a stimulus in noisy environments. However, both neurophysiological recording and data analytic limitations have made it difficult to investigate this circuit architecture in the primate. Here, we describe a GLM-based modeling approach which provides a unifying analysis framework to link attractor network theories and recently-published macaque electrophysiological data. Applying this framework to both spiking data and the theoretical spiking network, we found that the data are inconsistent with default assumptions about the cell-type specific network architecture, but suggest alternate circuit diagrams that are viable. Rather than an indiscriminate “untuned” population of inhibitory cells that is proposed by the standard model, we found that inhibitory connections were stimulus-selective and proportional to excitatory connections, which served to precisely balance the network, rather than indiscriminately dampen the excitation. However, unlike excitatory neurons, inhibitory neurons lacked spatially-selective persistent activity in the traditional sense, identified in their averaged response profiles. Furthermore, the excitatory (but not inhibitory) subpopulation in area LIP displayed spatially selective coupling with other neurons indicative of an attractor network, but this result was not as pronounced in area FEF. These findings suggest revisions to standard models of persistent activity and reinforce LIP as a locus for attractor dynamics during persistent activity. More generally, this analysis framework can characterize the emergent network dynamics in both data and models which are not necessarily intuitive even for known circuit designs.